Content coding like Verilog/VHDL, or System C or equivalent, exposure to complex/high density FPGAs and FPGA-SoCs
Familiarity with Matlab and Simulink
Vitis Unified Software Platform - Xilinx or similar
Qualification:
•Bachelor's in Electronics or equivalent stream and a minimum of 10 years’ experience or Master's Degree in a related specialization with a minimum
of 8 years’ experience in Electronics Design/Embedded Electronics, out of which the most recent 6 years must have been in state of the art high density FPGA environments.