The knowledge base required in the candidate will in general be a clear understanding of the fundamentals of

• Coding for FPGA environment, a significant experience profile of doing this.
• Excellent familiarity and skill in VHDL (or Verilog) and with MATLAB, and porting from it
• Knowledge of the architectures of modern high-density FPGAs and SoC Devices from Xilinx (Now AMD) or Actel (Now Microchip) FPGAs and familiarity with the use of these
• Excellent familiarity with the development environments for these devices and the simulation and pre-burn performance validation tools
• Very good experience of actually porting developed code into the hardware platforms and test the same for target performance characteristics, and the skill in spotting problems and be able to relate observations in tests back to necessary refinements in code
• Exposure to safe coding practices and high reliability engineering
• Specific successful design experience with at least two of the following:
• Encryption, AES standards; desirable exposure to custom encryption with significantly longer keys
• Data compression techniques, especially image data
• CCSDS standards for data handling

The successful candidate is likely to have

• An electronics degree, masters preferred but not necessary
• A consistent career in FPGA based firmware design and coding (6 to 10 years at least) with exposure to high density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs with many designs turned out successfully in high volume data handling including Encryption/Compression/CCSDS etc
• Good experience in debugging systems, including the ability to probe hardware and make sense of the time domain / frequency domain observations
• A good knowledge of how to estimate rough-order-of-magnitude power consumption figures of FPGA designs even before a full design is evolved

Note: Interviews are likely to be multi-level very detailed. Please who do not check most of the points above may not be suitable at all.